Per Stenström#

Full CV

1. Experience

Current Activities:

Professor of Computer Engineering with a Chair in Computer Architecture, Chalmers University of Technology, Göteborg, Sweden since November 1995. My main current activities involve the following:

• Manager of a Research Program in Computer Architecture. The research focus is on design principles and design methods for embedded and high-performance computer systems. Research issues span memory system design, architecture support for parallel execution; transactional memory and thread speculation, performance analysis and modeling methodologies, real-time systems, and energy-aware system design tradeoffs. I currently participate in one Integrated EU Project (SARC), a STREP under EU FP7 (VELOX) as well as being a partner in the EU FP7 Network of Excellence HiPEAC. I have also launched the CHAMPP project (Chalmers Adaptive Multi-Processing Project)
• Teaching. I annually teach advanced courses on computer architecture (computer architecture and parallel computer systems). I am writing a text book on Computer Architecture with Michel Dubois — my long-term collaborator and dear friend.
• Professional service to the scientific community. I service on a regular basis numerous program committees for top conferences in computer architecture and parallel processing and am associate editor of IEEE Computer Architecture Letters since 2001, subject area editor of Journal of Parallel and Distributed Computing since Oct. 1993. I was editor of IEEE Trans. on Computers between 2001 and 2004. I am the founding editor-in-chief of Transactions on HiPEAC which was launched in 2006 and I am an associate editor of IEEE Transactions on Parallel and Distributed Systems.
• Entrepreneurship. I am the founder and CTO of Nema Labs AB (founded in 2007) and member of its board of directors. I was the CEO from 2007-2009.

Previous Employments/Appointments:

Adjunct professor at Göteborg University, 2002-2007
Acting Dean of the IT University, 2002-2007

Both these committments had their roots in my active involvement in founding the IT-University in Goteborg. I was recruited to be a member of the Steering Committee to establish the vision and strategic goals of an academic institution that should not only act as an umbrella for academic activities in information technology at Chalmers and Gothenburg University. More importantly, however, it should form an environment that promotes new disciplines that are particularly important for the society. The IT-University went from a project organization to a formal institution in 2002. I contributed to the developments by establishing a Bachelor and Masters program in Software Engineering together with Lars Mathiassen. I also contributed at the managerial level in processes to establish the agenda for the Ph. D. education and the recruitment plans and research funding strategies for this new academic institution.

Visiting Positions in the U.S.A.

I have had the privilege of working with so many wonderful and highly talented individuals in the past in a country that, in my view, is outstanding to leverage on individual assets. The individuals I have been fortunate to collaborate with are listed explicitly below and deserve special mentioning. Besides, my visits in the USA have enriched me at the personal level to a great extent. From a professional standpoint, they boosted my abilities to deliver high quality research and mentorship to young researchers and my understanding of how it can be best transferred to society in efficient ways.

• Sun Microsystems from December 2002 to July 2003. I did my sabbatical in the Advanced System Development Center and investigated concepts for future High-Performance Computer Systems. My manager there was vice-president Dr. Rick Lytel.
• University of Southern California, Department of EE-Systems from July 1993 to September 1993. Worked with Professor Michel Dubois on the specification of the architecture of an experimental shared-memory multiprocessor system. Michel and I have continously worked together since 1990.
• Stanford University, Computer Systems Laboratory from June 1991 to December 1991. Worked with Professor Anoop Gupta on performance evaluation and architectural innovation of scalable shared-memory multiprocessor architectures. We developed the Flat-COMA proposal during that time.
• Carnegie-Mellon University, Department of Computer Science from September 1987 to May 1988. Worked with Professor Zary Segall on implementation and evaluation of shared-memory models on distributed system architectures. We evaluated one of the first shared-memory model implementations on a distributed system.

In the really early phases of my career, I did the following

Associate Professor of Computer Engineering, Lund University, Sweden, from November 1993 until November 1995 (before that on the faculty since July 1988 and a Ph. D. student since February 1984).

• Taught graduate and undergraduate courses in Computer Architecture, Switching Theory, and Hardware Design. I developed a textbook on basic computer organization and assembly language programming that was printed by Prentice Halls,
• Led a research group since 1990 in Parallel Computer Architecture. I supervised three Ph. D. students that successfully earned their degrees until my move to Chalmers. My group was very successful; we got five ISCA papers accepted during the five years this group existed before I left for a full professorship at Chalmers.
• Was Director of Studies at the department since July 1988.
• Was member of the Board of the Graduate School of Electrical and Computer Engineering at Lund University since November 1993.
• Was acting full professor from January 1995 until June 1995

Advisory Roles, Consultancy, and Commisions of Trust in academeia and industry

• Scientific advice. I was a scientific advisor of the Swedish Institute of Computer Science between 1995 and 1998.
• Chair of the council for the faculty at the School of Electrical and Computer Engineering. Between July 1998 until I became a vice-dean in April 1999.
• Vice-Dean of the School of Electrical and Computer Engineering. 1999-2001.
• Vice-Dean of the School of Computer Science and Engineering at Chalmers. 2001-2003.
• Member of the board of Blekinge Institute of Technology. 2001-2004.
• Program Coordinator for three bigger efforts:

PAMP (1998-2003) (Performance-demanding Applications on Multi-Processors) is a project funded by The Foundation for Strategic Resaearch which involves research groups at five research institutions and five companies across the country. The focus is on software and hardware design methods for using multiprocessors in industrial applications. The program ran for five years (from 1998-2003) with an annual budget of 5 MSEK and is sponsored by the Swedish Foundation for Strategic Research (SSF).The output of the number was truly amazing with some ten PhDs.

FLEXSOC (2003-2007), The objective of this project was to build a heterogeneous SOC platforms of a wide variety of core functionalities and make it significantly more programmable and energy-efficient. Our approach to make it more programmable was to define an architecture framework in which accelerators could be added with a low performance cost and engineering cost as possible. We managed to show that are unifying approach - called FlexCore - to host application-specific accelerators with general-purpose cores is feasible and it can yield lower energy consumption. In an evaluation of the project, one comment was that we have achieved a lot despite the limited funds.

CHAMMP (2010-2014). This project got funding inn November 2009 from the Swedish Research Council and aims at resources on a multicore chip are best expended to provide high performance across a large set of applications with acceptable energy loss. Our approach is to add adaptivity to processor cores as well as the memory system.

• Chair of Research Evaluation Panel in Computer Science. I was the chair of the group to evaluate research proposals sent to the Computer Science area in the Swedish Research Council between 2001 and 2005. My main role was to make sure that all applications are fairly evaluated by putting together a trustful panel and soliciting a large number of external reviewers. It was a very good experience to learn how to deal with many promising proposals and really make the best to bet on the right horses in an as solid way as possible.
• Board of directors. Virtutech AB (1998 - 2002), I owned the technical perspective here and helped the rest of my board colleagues to understand what where the most strategic directions to take into the plan for company growth. Virtutech is today a solid company located in the US. This mission not only introduced me to the world of startups but also made it clear that I should try the same one day.
• Technical advisor. Imsys AB (2001-2003) I helped this Swedish processor company to position themselves among other processors.
• Consultancy. Sun Microsystems Inc. (2003-2006) I worked with Sun in capacity as an expert and was called in to take part in various design reviews. I also contributed with a lot of IPR and filed about eight patents.
• Member of the Board of the IT University of Goteborg. 2006 - 2009.
• Member of research priority panel for the Swedish Strategic Research Foundation(2006-2007) in the area of software. I pushed especially our need of a strategy towards multicore computers.

2. Academic degrees

Docent degree in Electrical and Computer Engineering at Lund UniversityNovember 1993.
Ph. D. degree in Computer Engineering
Thesis title: Aspects of Memory Systems for MIMD Multiprocessors with a Shared-Memory Model, Department of Computer Engineering, Lund University, May 1990. Thesis advisor: Prof. Lars Philipson
Master of Science in Electrical Engineering:
Thesis title: Digital in- och uppspelning av deltamodulerat tal (in Swedish), Department of Computer Engineering, Lund University, October 1981. Thesis advisor: Prof. Lars Philipson

3. Research Focus

My whole research production has centered on the general question how to design general-purpose computer systems to deliver a high performance within the constraints of the technology and given current application and technology trends. In focusing on this general question, it has been important to me to take a holistic system view in addressing how applications, system software, and compiler technology interact with the hardware platform and how performance can be improved by design tradeoffs across the hardware/ software boundary. My research has focused on improving multiprocessor technology mainly.

The key contributions I have made to the field of computer architecture concerns:

• Shared-memory multiprocessor architecture; specifically design of high-performance

memory systems. I have made considerable contributions to the design of multiprocessor systems, especially how to make them scale to a large number of processors. I have been a key contributor to the general understanding of how to use caches in such systems to overcome the memory system bottleneck by a range of innovations regarding cache coherence maintenance, latency tolerance techniques, and hardware/software tradeoffs in supporting memory consistency models. This work has been very influential.

• Compiler optimization techniques; specifically to remove performance overhead associated

with cache coherence maintenance. My early work on using dataflow analysis techniques to reduce latency and bandwidth associated with loads and stores to shared data has been quite pioneering. This work has yielded lots of citations.

• Performance evaluation methodologies; specifically simulation techniques based on

direct execution and analytical models. I have contributed with improved methodologies for full system simulation by leading the developments of the CacheMire test bench and participated in the developments of Simics, a full system simulation platform. I’ve also recently developed an analysis method that can make accurate estimates of the worst-case execution time of programs on high-performance processors taking caching and multiple-issue pipelining techniques into consideration. This work has been very influential.

• Thread-level speculative execution. Over the last several years, I’ve taken an interest

in simplifying the task of extracting coarse-grained (or thread-level) parallelism out of sequential programs recognizing the possible trend of migrating multiprocessor support to the chip level. I’ve run several projects in which we consider hardware/software tradeoffs in the implementation of efficient speculation mechanisms and in how to extract module-level parallelism, i.e., parallelism across procedures, functions, and methods. This project has led to great insights on how to support this paradigm both at the hardware as well as the software level. It has been influential.

• A natural continuation of this work is on transactional memory which builds on cache

coherence work I did in the past and my more recent focus on identifying useful support at the architectural level to ease parallel programming. My group has explored a wide range of hardware protocols for implementation of transactional memory with the goal of making them efficient and yet reasonably simple to implement to accelerate deployment in industry. This is ongoing work.

• Design tradeoffs for high performance under power consumption constraints.

Another recent interest concerns how to do design tradeoffs to maximize the performance under energy dissipation constraints. My goal is to understand what affects architectural tradeoffs regarding high-performance memory system design and methodologies to aid designers in making such tradeoffs. A project with Ericsson Mobile Communication in which we especially consider architectural techniques to fuel the development of powerful handheld computers/phones. This project yielded many interesting results. We came up with energy-efficient cache coherence solutions and helped defined the key concept for snoop filtering which is widely used in machines today. We continued to look at techniques to improve utilization of memory resources. Our work on memory compression and multi-level memory hierarchies has triggered a lot of research in our footsteps.

4. Teaching

My teaching experience ranges from developments of individual courses to specializations (suites of courses) in Computer Engineering. Apart from course developments, I have a strong interest in developing new pedagogical approaches to teach topics in complex engineering systems.

• I have taught courses on Digital Design, Computer Organization, Computer Architecture, and Parallel Computer Architecture over the past two decades.
• I’ve also been involved in curriculum design. In 1997 I led the development of an advanced program within the computer science and engineering curriculum in computer systems engineering. The program is intended to provide an in-depth coverage of technologies and design methods for application-specific computer systems.
• I’m author of two textbooks on Computer Organization and Assembly Language Programming and another one is scheduled for release in 2010.
• I have developed advanced laboratories for courses in computer architecture; the one on instruction pipelining (see conference paper 14 in Section 5.3) is a good example. It has been used in classes at Lund University and Chalmers University of Technology for 15 years which gives a token for its fundamental nature!
• I have offered several tutorials and graduate courses at summer schools (CNRS, France, 1994; ARTES, Stockholm, Sweden, 1998), institutions (UPC Barcelona, 1998, 2002), companies (Ericsson 1998), and conferences (EuroPar95 and EuroPar97), as well as being an invited speaker on educational issues (the IEEE CAEWS workshop) .
• I gave a two-week intensive Ph. D. course (24 hours) on shared-memory multiprocessors at UPC in Barcelona in April 2002.
• I gave a course on chip multiprocessors in Italy (http://escher.elis.ugent.be/hipeac/summerschool/) in conjunction with the 1st HiPEAC summer school, July 2005.
• I will give a course on “Methods to Transfer Research To Business” with Andrzej Brud of Chalmers Innovation at the 5th HiPEAC summer school, July 2010.