Thomas Ernst#

Membership Number:6659
Membership type:ORDINARY
Section:PHYSICS & ENGINEERING SCIENCES
Elected:2023
Main Country of Residence:FRANCE
Homepage(s):https://www.linkedin.com/in/thomas-ernst-chips/https://www.researchgate.net/profile/Thomas-Ernsthttps://www.scopus.com/authid/detail.uri?authorId=35236647700


Present and Previous Positions
  • 2018 - present Chief scientist and VP research at CEA LETI with responsibility for long term research strategy and partnerships
  • 2022 - 2027 National co-leader of the French Electronics Program that includes all french reasearch institues in his fields
  • 2002 - 2007 within CEA-Leti within Crolles Alliance (STMicro, Freescale, Philips) to develop Multichannel transistor
    • Developed SiGe and Ge transistors and then multichannel GAA transistors
    • Demonstrated first PMOS Ge transistor with high-k metal metal gate co-integrated with strain-Si NMOS (published @ IEDM 2005
    • Developpement of Strained SOI technology in collaboration with SOITEC (published @ Solid State electronics 2004)
    • Main achievement was the first demontration of functionnal multichannel GAA transistor (IEDM 2006) now introduced in industry for 2-3nm advanced CMOS
  • 1997-2000 Research contract at SMicroelectronics during my PhD (at CNRS). Evaluation for STM the potential of FD-SOI under the supervision of Prof. Cristoloveanu (Fellow IEEE). Best paper award (IEEE SOI conference)with first characterisation of 3nm thick SOI transistor. His models and evaluation continue to be valid today and FDSOI produced now by STMicro in and Global Founderies in Dresden
  • 2000 Began at CEA-Leti to develop SiGe and Ge transistor.

Fields of Scholarship
  • Modeling
  • Nano electromechanicas systems
  • Sensors
  • CMOS
  • Technology
  • MIcroelectronics
  • Simulation
  • Memories

Honours and Awards
  • 2022 Promoted CEA Fellow (CEA is a Main research organisme is France with about 20 000 employees)
  • 2020 and 2021 General Chair of the IEEE Euopean conference on microelectronics (Technology and Design) ESSCIRC-ESSDERC
  • 2017 Best student award IEEE ICICDT (G. Usai et al.)
  • 2015 Promoted IEEE Senior
  • 2010 Best student award IEEE EDS Japan, (K. Tachi et al.). French/Japan PhD.
  • 2009 T. Ernst recipient for 5 years grant by European Research Council (ERC) on multiphysics integrated nano-systems
  • 2008 Paper selected in the IEEE IEDM highlights (C. Dupré, T. Ernst et al.)
  • 2008 Best student paper award IEEE ESSDERC (C. Dupré, T. Ernst et al.)
  • 2007 Best student paper award IEEE ESSDERC (E. Bernard, T. Ernst et al.)
  • 2006 Best PhD award from Grenoble Polytechnics Institute (F. Andrieu)
  • 2006 Paper selected in the IEEE IEDM highlights (T. Ernst et al.)
  • 2005 Best student paper award IEEE ESSDERC (F. Andrieu, T. Ernst et al.)
  • 1999 Best student paper award IEEE SOI conference (T. Ernst et al.)

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