Jordi Cortadella - Publications#
Full list of publications
One of the research topics in which Jordi Cortadella invested significant effort during many years is on Asynchronous Circuits and Elastic Circuits. Here are two lectures that were presented at the Collège de France, invited by Prof. Gérard Berry:
Few relevant publications in the research trajectory of Jordi Cortadella are next listed.
- David Bañeres, Jordi Cortadella, and Mike Kishinevsky. A recursive paradigm to solve Boolean relations. IEEE Transactions on Computers, 58(4):512-527, April 2009. A previous version obtained the best paper award at the Design Automation Conference 2004 (San Diego). The papers proposes a novel algorithm to solve Boolean relations. The algorithm has several features: efficiency, wide exploration of solutions, and customizable cost function. The experimental results show the applicability of the method in logic minimization problems and tangible improvements with regard to previous heuristic approaches.
- Josep Carmona, Jordi Cortadella, Mike Kishinevsky, and Alexander Taubin. Elastic circuits. IEEE Transactions on Computer-Aided Design, 28(10):1437-1455, October 2009. It was one of the TOP25 Downloaded Papers in Year 2009 of the IEEE Transactions on Computer-Aided Design journal. The paper proposes a unified view of asynchronous and synchronous-elastic circuits, showing how the theoretical results obtained in both areas can be shared and re-used. It also describes automatic methodologies to transform conventional circuits into elastic, either synchronous or asynchronous.
- Jordi Cortadella and José M. Llabería. Evaluation of A+B=K conditions without carry propagation. IEEE Transactions on Computers, 41(11):1484-1488, November 1992. This paper proposes a novel scheme for the arithmetic comparison A+B=K. The paper had a relevant impact not only in academia but also in industry. Some of the industrial citations came from Toshiba (1995), NEC (1995), Bell Labs (1996), IBM (1998), Sun Microsystems (1998), Texas Instruments (1998), AMD (1999), Integration Berkeley (1999) and ARM (2005). The proposed circuit and variations of it were used in some industrial designs: the floating-point multiplier of the AMD-K7 microprocessor (AMD,1999), the sum-addressed-memory (SAM) cache of a superscalar processor implementing the Sparc V9 64b architecture (Sun Microsystems, 1998), the conditional-branch resolution of the PowerPC (IBM, 1998), the NEON Floating Point (an SIMD architecture designed to accelerate 3D graphics, ARM 2005), the multiply-adder of a 32-bit RISC machine for signal processing (NEC, 1995) and the compare unit of the guTS (an experimental core based on the PowerPC, IBM 1998).
- J. Cortadella, M. Kishinevsky, A.Kondratyev, L. Lavagno, and A. Yakovlev. Petrify: a tool for manipulating concurrent specifications and synthesis of asynchronous controllers. IEICE Transactions on Information and Systems, E80-D(3):315-325, March 1997. The paper covers the main features of a synthesis tool that has been used in two different application domains: synthesis of asynchronous circuits and synthesis of Petri nets. The tool is now considered as the state-of-the-art in the synthesis of asynchronous controllers specified with Petri nets and is often used by designers in this area. The tool also provided the first practical approach for the synthesis of Petri nets from transition systems using the theory of regions by Ehrenfeucht and Rozenberg. One of the main contributions of the tool was the incorporation of the theory of regions to solve some of the synthesis problems of asynchronous control circuits.
- Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, and Christos Sotiriou. Desynchronization: Synthesis of asynchronous circuits from synchronous specifications. IEEE Transactions on Computer-Aided Design, 25(10):1904-1921, October 2006. A previous version of this paper received the best-paper award at the ASYNC conference in 2004. The paper proposes an automatic method to transform a synchronous circuit into asynchronous. The core of this method was the technical basis for the creation of a start-up company in the Silicon Valley (Elastix Corp.) in 2007, in which Prof. Cortadella was on of the co-founders.
- Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, and Alexandre Yakovlev. Logic synthesis of asynchronous controllers and interfaces. Advanced Microelectronics. Springer-Verlag, 2002. This is a book that covers the complete design flow of the synthesis asynchronous controllers using Petri nets (as a formalization of timing diagrams). It covers different problems that need to be solved from the specification to the implementation: calculation of reachable states, state encoding, logic synthesis, logic decomposition and verification.
- Jordi Cortadella, Michael Kishinevsky, Luciano Lavagno, and Alexandre Yakovlev. Deriving Petri nets from finite transition systems. IEEE Transactions on Computers, 47(8):859-882, August 1998. This paper gives the algorithmic basis for the synthesis of Petri nets from transition systems. The paper has been cited by authors working in different disciplines: Petri nets, process mining, asynchronous circuits.
- Robert Clarisó and Jordi Cortadella. The octahedron abstract domain. Science of Computer Programming, 64(1):115-139, January 2007. The paper proposes a new domain for the verification of systems using abstract interpretation. The main contribution of the paper is the versatility of the abstract domain and the efficient algorithms proposed to compute abstract value. The citations show the applicability to different areas (in software and hardware). In particular, it was successfully applied to the verification of timed circuits.
- Jordi Cortadella. Timing-driven logic bi-decomposition. IEEE Transactions on Computer-Aided Design, 22(6):675-685, June 2003. The paper proposes a novel approach for the synthesis of circuit targeting at delay minimization. The method is based on the use of bi-decomposition techniques and the calculation of approximation logic functions.
- Enric Musoll, Tomás Lang, and Jordi Cortadella. Working-zone encoding for reducing the energy in microprocessor address buses. IEEE Transactions on VLSI Systems, 6(4):568-572, December 1998. The paper proposes a novel encoding scheme to reduce the energy in memory address buses. The scheme exploits the locality of memory addresses and uses a compressed encoding to transfer the information across the bus. This paper has been cited by numerous authors working in low-energy systems.
