!!Jürgen Teich - 

[List of publications|teich_juergen_publications_juni_2011.pdf]
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!Major Publications

1. C. Haubelt and J. Teich. Digitale Hardware/Software-Systeme: Spezifikation und Verifikation. Springer, 2010.
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2. J. Teich and C. Chaubelt. Digitale Hardware/Software-Systeme: Spezifikation und Synthese. 2nd edition, Springer, 2007
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3. M. Platzner, J. Teich and N. Wehn. Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications.
Springer 2010.
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4. J. Keinert and J. Teich. Design of Image Processing Embedded Systems Using Multidimensional Data Flow. Embedded Systems Series, Springer, 1st edition, 2011.
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5. A. Gerstlauer, C. Haubelt, A. Pimentel, T. Stefanov, D. Gajski and J. Teich. Electronic System-Level Synthesis Methodologies.
In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28(10), pages 1517-1530, October 2009.
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6. D. Ziener and J. Teich. Concepts for run-time and error-resilient control flow checking of embedded RISC CPUs. Int. Journal of Autonomous and Adaptive Communications Systems, Vol. 2, No. 3, pp. 256-275, Inderscience Enterprises Ltd, 2009.
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7. D. Kissler, A. Strawetz, F. Hannig and J. Teich. Power-efficient Reconfiguration Control in Coarse-grained Dynamically Reconfigurable Architectures. Journal of Low Power Electronics, 5(1):96-105, American Scientific Publishers, 2009.
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8. H. Dutta, D. Kissler, F. Hannig, A. Kupriyanov, J. Teich and B. Pottier. A Holistic Approach for Tightly Coupled Reconfigurable Parallel Processors. Microprocessors and Microsystems, 33(1):53-62, 2009.
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9. J. Keinert, M. Streubühr, T. Schlichter, J. Falk, J. Gladigau, C. Haubelt, J. Teich and M. Meredith. SYSTEMCODESIGNER - An Automatic ESL Synthesis Approach by Design Space Exploration and Behavioral Synthesis for Streaming Applications. In ACM Transactions on Design Automation of Electronic Systems, 14(1), pp. 1-23, 2009.
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10. D. Koch, C. Beckhoff and J. Teich. Hardware Decompression Techniques for FPGA-based Embedded Systems. ACM Transactions on Reconfigurable Technology and Systems (TRETS), vol.2, no. 9, June 2009.
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11. S. Fekete, J. van der Veen, A. Ahmadinia, D. Göhringer, M. Majer and J. Teich. Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.16(9):1210-1219, September 2008.